Thermal Heat Reduction Techniques for Semiconductor Technology (Thrust) - Phase 1

• Country: Netherlands
• Summary: Thermal Heat Reduction Techniques for Semiconductor Technology (Thrust) - Phase 1
• NLT Ref No: 101034071
• Deadline: 02 Jul 2024
• Financier: Other Funding Agencies
• Purchaser Ownership: Government
• Tender Value: Refer Document
• Notice Type: Tender
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• Description:
• Tenders are invited for Thermal Heat Reduction Techniques for Semiconductor Technology (Thrust) - Phase 1. There is a trend in future navigation satellites, telecommunication architectures and imaging radar systems to move towards mm-wave active array antenna systems with large numbers of tightly spaced transmit receive elements. The close element spacing means more heat is dissipated in a small volume, requiring highly thermally conductive semiconductor devices to allow simplification of the thermal management design. Thermal management is also an issue for lower frequency high power Solid State Power Amplifiers (SSPAs) in the 300W power level range, e.g. as used in Navigation payloads. Here the GaN transistor technology has to be significantly de-rated to prevent thermal issues degrading reliability. This prevents the full RF performance capability being utilised. Similarly, GaN on Si power devices for DC to DC converter applications need improvements in thermal management to maintain high power density operation, minimise on-state resistance and prevent thermal runaway effects. Improving the thermal conductivity of the substrate material can enable GaN devices to be operated reliably at RF output power densities as high as 20W/mm instead of the current 4 to 5 W/mm. In recent years, there have been advances made in the processing and deposition of novel, high thermal conductivity materials, such as synthetic Chemical Vapour Deposition (CVD) diamond. In Europe many research institutes are working on development of GaN-on-Diamond technology. European GaN-on-Diamond RF transistors have recently been demonstrated as part of the UK EPSRC funded GaN DAME programme. It is now necessary to initiate an activity to further investigate and mature potential techniques/technology options in order to make it available for the European space industry. As well as diamond, lower risk (but lower payback) options also worthy of investigation could include industrialisation and space qualification of Agsintering die attach techniques. This approach offers improved thermal conductivity compared to more conventional AuSn eutectic die attach, but with the prospect of improved manufacturing yield and lower cost. In addition, options for introducing microfluidic cooling techniques within the semiconductor and/or package itself offer great promise, but a more in-depth assessment regards space applicability needs to be made. A two-phase program of work is envisaged, where the plan in Phase 1 is to undertake processing trials to optimise the performance, manufacturability and reliability of microfluidic cooling and European GaN-on-Diamond technology in order to make it ready for industrialisation. In addition, package/die attach level thermal management improvement approaches shall also be investigated. A second follow on phase would be implemented to industrialise and qualify the most promising techniques. This activity encompasses the tasks of the first phase:Phase 1 - Investigation of advanced thermal management improvement techniques (10,000 k, 36months):- Market and business analysis to confirm application needs and specifications, risk analysis, time-to-market needs and proposed approaches to reduce development time-Technology trade-offs,- Common mask set and test plan definition, demonstrator targets,- Investigation and space compatibility evaluation of improved die attach assembly techniques,- Investigation of microfluidic cooling techniques at semiconductor and package level,- Investigation of new low thermal barrier resistance materials for device manufacture (e.g. Aluminium Nitride (AlN), Boron Nitride (BN), GaN on diamond and/or diamond on GaN growth/deposition techniques, techniques for scaling to large diameter wafers,- Investigation of novel transistor layout topologies (e.g. fishbone, segmented gate) to spread the heat generating area,- Wafer level processing trials using research institutes,- HPA demonstration by space end users.Key Output: Pre-industrialisation trials completed, identification of the most promising, space compatible, thermal management techniques to be considered for industrialisation in Phase 2.Phase 2 cost and planning will very much depend upon the technological choices to be made at the end of Phase 1. Therefore, budget and duration of phase 2 will be determined at the end of phase 1. Phase 2 will encompass the following tasks, which are not included in the present activity:Phase 2 - Industrialisation and technology transfer:- Technology transfer of preferred techniques (e.g. GaN on diamond, microfluidic cooling) to a European foundry process,- ESCC evaluation of improved die attach assembly techniques on an ESA approved assembly house,- Industrialisation of advanced thermal management techniques at package level,- HPA demonstration, using a combination of improved thermal management industrialised processes.Key Output: Industrialisation of the most promising thermal management techniques, successful HPA demonstration by space end users.Read more. Open Date: 07/05/2024 14:21 CET Closing Date: 02/07/2024 13:00 CET Price Range: 500 KEURO
• Documents:

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